/**
 * \file
 * <!--
 * This file is part of BeRTOS.
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 * it under the terms of the GNU General Public License as published by
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 * GNU General Public License for more details.
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 * As a special exception, you may use this file as part of a free software
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 * templates or use macros or inline functions from this file, or you compile
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 * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
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 *
 * \brief Configuration file for Debug module.
 *
 *
 * \author Daniele Basile <asterix@develer.com>
 */

#ifndef CFG_DEBUG_H
#define CFG_DEBUG_H

/**
 * Debug console port.
 * $WIZ$ type = "int"; min = 0
 */
#define CONFIG_KDEBUG_PORT 0

/**
 * Baudrate for the debug console.
 * $WIZ$ type = "int"; min = 300
 */
#define CONFIG_KDEBUG_BAUDRATE  57600UL

/**
 * Clock source for the UART module. You need to write the code to reprogram the respective clock at the required frequency in your project before calling kdbg_init().
 *
 * $WIZ$ type = "enum"
 * $WIZ$ value_list = "kdbg_clk_src"
 * $WIZ$ supports = "msp430"
 */
#define CONFIG_KDEBUG_CLOCK_SOURCE  KDBG_UART_SMCLK

/**
 * Clock frequency. (Only if different from MCLK's frequency, otherwise leave it zero)
 * $WIZ$ type = "int"; min = 0
 * $WIZ$ supports = "msp430"
 */
#define CONFIG_KDEBUG_CLOCK_FREQ 0UL

#endif /* CFG_DEBUG_H */
