mirror of
https://github.com/markqvist/OpenModem
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110 lines
4.4 KiB
C
110 lines
4.4 KiB
C
/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
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*
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* -->
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*
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* \brief Atmel SAM3 system controller registers.
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*/
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#ifndef SAM3_SYSCTL_H
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#define SAM3_SYSCTL_H
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/** Supply controller base */
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#if CPU_CM3_SAM3X
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#define SUPC_BASE 0x400E1A10
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#else
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#define SUPC_BASE 0x400E1410
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#endif
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/**
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* Supply controller offsets.
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*/
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/*\{*/
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#define SUPC_CR_OFF 0x0 ///< Supply Controller Control
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#define SUPC_SMMR_OFF 0x4 ///< Supply Controller Supply Monitor Mode
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#define SUPC_MR_OFF 0x8 ///< Supply Controller Mode
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#define SUPC_WUMR_OFF 0xC ///< Supply Controller Wake Up Mode
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#define SUPC_WUIR_OFF 0x10 ///< Supply Controller Wake Up Inputs
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#define SUPC_SR_OFF 0x14 ///< Supply Controller Status
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/*\}*/
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/**
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* Supply controller registers.
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*/
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/*\{*/
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#define SUPC_CR (*((reg32_t *)(SUPC_BASE + SUPC_CR_OFF ))) ///< Supply Controller Control
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#define SUPC_SMMR (*((reg32_t *)(SUPC_BASE + SUPC_SMMR_OFF))) ///< Supply Controller Supply Monitor Mode
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#define SUPC_MR (*((reg32_t *)(SUPC_BASE + SUPC_MR_OFF ))) ///< Supply Controller Mode
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#define SUPC_WUMR (*((reg32_t *)(SUPC_BASE + SUPC_WUMR_OFF))) ///< Supply Controller Wake Up Mode
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#define SUPC_WUIR (*((reg32_t *)(SUPC_BASE + SUPC_WUIR_OFF))) ///< Supply Controller Wake Up Inputs
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#define SUPC_SR (*((reg32_t *)(SUPC_BASE + SUPC_SR_OFF ))) ///< Supply Controller Status
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/*\}*/
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/**
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* Defines for bit fields in SUPC_CR register.
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*/
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/*\{*/
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#define SUPC_CR_VROFF 2 ///< Voltage Regulator Off
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#define SUPC_CR_XTALSEL 3 ///< Crystal Oscillator Select
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#define SUPC_CR_KEY_P 24
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#define SUPC_CR_KEY_MASK (0xff << SUPC_CR_KEY_P) ///< SUPC_CR key
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#define SUPC_CR_KEY(value) (SUPC_CR_KEY_MASK & ((value) << SUPC_CR_KEY_P))
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/*\}*/
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/**
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* Defines for bit fields in SUPC_SR register.
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*/
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/*\{*/
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#define SUPC_SR_WKUPS 1 ///< WKUP Wake Up Status
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#define SUPC_SR_SMWS 2 ///< Supply Monitor Detection Wake Up Status
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#define SUPC_SR_BODRSTS 3 ///< Brownout Detector Reset Status
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#define SUPC_SR_SMRSTS 4 ///< Supply Monitor Reset Status
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#define SUPC_SR_SMS 5 ///< Supply Monitor Status
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#define SUPC_SR_SMOS 6 ///< Supply Monitor Output Status
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#define SUPC_SR_OSCSEL 7 ///< 32-kHz Oscillator Selection Status
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#define SUPC_SR_WKUPIS0 16 ///< WKUP Input Status 0
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#define SUPC_SR_WKUPIS1 17 ///< WKUP Input Status 1
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#define SUPC_SR_WKUPIS2 18 ///< WKUP Input Status 2
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#define SUPC_SR_WKUPIS3 19 ///< WKUP Input Status 3
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#define SUPC_SR_WKUPIS4 20 ///< WKUP Input Status 4
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#define SUPC_SR_WKUPIS5 21 ///< WKUP Input Status 5
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#define SUPC_SR_WKUPIS6 22 ///< WKUP Input Status 6
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#define SUPC_SR_WKUPIS7 23 ///< WKUP Input Status 7
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#define SUPC_SR_WKUPIS8 24 ///< WKUP Input Status 8
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#define SUPC_SR_WKUPIS9 25 ///< WKUP Input Status 9
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#define SUPC_SR_WKUPIS10 26 ///< WKUP Input Status 10
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#define SUPC_SR_WKUPIS11 27 ///< WKUP Input Status 11
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#define SUPC_SR_WKUPIS12 28 ///< WKUP Input Status 12
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#define SUPC_SR_WKUPIS13 29 ///< WKUP Input Status 13
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#define SUPC_SR_WKUPIS14 30 ///< WKUP Input Status 14
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#define SUPC_SR_WKUPIS15 31 ///< WKUP Input Status 15
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/*\}*/
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#endif /* SAM3_SYSCTL_H */
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