Commit graph

69 commits

Author SHA1 Message Date
Nikita
34e5b16e18 Allow to override PYTHON[23] in Makefiles (#1639)
$(PYTHON2) and/or $(PYTHON3) might differ from python and/or python3,
accordingly. Allow to override these variables by user choice.
2020-05-30 10:51:54 +08:00
z
a012f75754 RISCV support ISRV32/ISRV64 (#1401)
* Added RISCV dir to contain the RISCV architecture engine code. Adding the TableGen files generated from llvm-tblgen. Add Disassembler.h

* Started working on RISCVDisassembler.c - RISCV_init(), RISCVDisassembler_getInstruction, and RISCV_getInstruction

* Added all functions to RISCVDisassembler.c and needed modifications to RISCVGenDisassemblerTables.inc. Add and modified RISCVGenSubtargetInfo.inc. Start creation of RISCVInstPrinter.h

* Finished RISCVGenAsmWriter.inc. Finished RISCVGenRegisterInfo.inc. Minor fixes to RISCVDisassembler.c. Working on RISCVInstPrinter

* Finished RISCVInstPrinter, RISCVMapping, RISCVBaseInfo, RISCVGenInstrInfo.inc, RISCVModule.c. Working on riscv.h

* Backport it from: 0db412ce3b

* All RISCV files added. Compiled correctly and initial test for ADD, ADDI, AND works properly.

* Add refactored cs.c for RISCV

* Testing all I instructions in test_riscv.c

* Modify the orignal backport for RISCVGenRegisterInfo.inc, capstone.h and test_iter to work w/ the current code strcuture

* Fix issue with RISCVGenRegisterInfo.inc - RISCVRegDesc[] (Excess elements in struct initializer). Added RISCV tests to test_iter.c

* fixed bug related to incorrect initialization of memory after malloc

* fix compile bug

* Fix compile errors.

* move riscv.h to include/capstone

* fix indentation issues

* fix coding style issues

* Fix indentation issues

* fix coding style

* Move variable declaration to the top of the block

* Fix coding indentation

* Move some stuff into RISCVMappingInsn.inc

* Fix code sytle

* remove cs_mode support for RISCV

* update asmwriter-inc to LLVM upstream

* update the .inc files to riscv upstream

* update riscv disassembler function for suport 16bit instructions

* update printer & tablegen inc files which have fixed arguments mismatch

* update headers and mapping source

* add riscv architecture specific test code

* fix all RISCV tons of compiler errors

* pass final tests

* add riscv tablegen patchs

* merge with upstream/next

* fix cstool missing riscv file

* fix root Makefile

* add new TableGen patchs for riscv

* fix cmakefile.txt of missing one riscv file

* fix declaration conflict

* fix incompatible declaration type

* change riscvc from arch to mode

* fix test_riscv warnning

* fix code style and add riscv part of test_basic

* add RISCV64 mode

* add suite for riscv

* crack fuzz test

* fix getfeaturebits test add riscvc

* fix test missing const qualifier warnning

* fix testcase type mismatch

* fix return value missing

* change getfeaturebits test

* add test cs files

* using a winder type contain the decode string

* fix a copy typo

* remove useless mode for riscv

* change cs file blank type

* add repo for update_riscv & fix cstool missing riscv mode

* fix typo

* add riscv for cstool useage

* add TableGen patch for riscv asmwriter

* clean ctags file

* remove black comment line

* fix fuzz related something

* fix missing RISCV string of fuzz

* update readme, etc..

* add riscv *.s.cs file

* add riscv *.s.cs file & clear ctags

* clear useless array declarations at capstone_test

* update to 5e4069f

* update readme change name more formal

* change position of riscv after bpf and modify copyright more uniform

* clear useless ctags file

* change blank with tab in riscv.h

* add riscv python bindings

* add riscv in __init__.py

* fix riscv define value for python binding

* fix test_riscv.py typo

* add missing riscvc in __init__.py of python bindings

* fix alias-insn printer bug, remove useless newline

* change inst print delimter from tab to bankspace for travis

* add riscv tablegen patch

* fix inst output more consistency

* add TableGen patch which fix inst output formal

* crack the effective address output for detail and change register print function

* fix not detail crash bug

* change item declaration position at cs_riscv

* update riscv.py

* change function name more meaningfull

* update python binding makefile

* fix register enum sequence according to riscvgenreginfo.inc

* test function name

* add enum s0/fp in riscv.h & update riscv_const.py

* add register name enum
2019-03-09 08:41:12 +08:00
david942j
cac94ccee5 New architecture: BPF (#1388)
* Basic changes of new arch - BPF

* Define some constants

* defined some API methods

* Able to print MISC instruction

* Follow Linux coding style

* Ability to show ALU insn names

* decode return

* Add suite/MC/BPF

* decode jump

* decode store

* decode load

* print instruction done

* try to implement BPF_reg_access

* Implements explicit accessed registers and fix some tiny bugs

* Fix unhandled ja case

* Added BPF_REG_OFF do fix wrong display in jump class

* Great I'm able to decode cBPF with eyes

* Fix: misunderstood the 16-byte instruction's imm

* Add ldxdw

* Add extended-all.cs

* Implements cstest/bpf_getdetail.c

* Fix memory leak

* Add BPF to fuzz

* Implemented regs_read and regs_write

* Fix missing write-access on ALU's dst

* Updated cstool/, test_basic.c, test_detail.c, and test_iter.c

* Updated docs

* Fix type of cs_bpf#operands

* Implements python bindings

* Fix some bugs found by self code review

* Remove dummy tests

* remove typeof

* Address comments

* Fix MSVC's warnings and add test_bpf.py to bindings/python/Makefile

* Fix: call is not offset
2019-02-18 17:39:51 +08:00
Nguyen Anh Quynh
5021789b8f python: add test_evm.py to Makefile check target 2019-02-18 10:46:57 +08:00
Sebastian Macke
8663d75c56 MOS65XX: Add binding for python
Signed-off-by: Sebastian Macke <sebastian@macke.de>
2018-12-06 22:53:43 +01:00
xambroz
5c168e515d introduce PYTHON2 and PYTHON3 variables in the makefiles (#1236)
This change makes it possible to be explicit during the build time
on what python version/binary use to compile.
2018-08-29 12:26:53 +08:00
Nguyen Anh Quynh
afffa5d741 merge next to master 2018-07-20 12:36:50 +08:00
Wolfgang Schwotzer
22b4d0eb41 M680X: Target ready for pull request (#1034)
* Added new M680X target. Supports M6800/1/2/3/9, HD6301

* M680X: Reformat for coding guide lines. Set alphabetical order in HACK.TXT

* M680X: Prepare for python binding. Move cs_m680x, m680x_insn to m680x_info. Chec
> k cpu type, no default.

* M680X: Add python bindings. Added python tests.

* M680X: Added cpu types to usage message.

* cstool: Avoid segfault for invalid <arch+mode>.

* Make test_m680x.c/test_m680x.py output comparable (diff params: -bu). Keep xprint.py untouched.

* M680X: Update CMake/make for m680x support. Update .gitignore.

* M680X: Reduce compiler warnings.

* M680X: Reduce compiler warnings.

* M680X: Reduce compiler warnings.

* M680X: Make test_m680x.c/test_m680x.py output comparable (diff params: -bu).

* M680X: Add ocaml bindings and tests.

* M680X: Add java bindings and tests.

* M680X: Added tests for all indexed addressing modes. C/Python/Ocaml

* M680X: Naming, use page1 for PAGE1 instructions (without prefix).

* M680X: Naming, use page1 for PAGE1 instructions (without prefix).

* M680X: Used M680X_FIRST_OP_IN_MNEM in tests C/python/java/ocaml.

* M680X: Added access property to cs_m680x_op.

* M680X: Added operand size.

* M680X: Remove compiler warnings.

* M680X: Added READ/WRITE access property per operator.

* M680X: Make reg_inherent_hdlr independent of CPU type.

* M680X: Add HD6309 support + bug fixes

* M680X: Remove errors and warning.

* M680X: Add Bcc/LBcc to group BRAREL (relative branch).

* M680X: Add group JUMP to BVS/BVC/LBVS/LBVC. Remove BRAREL from BRN/LBRN.

* M680X: Remove LBRN from group BRAREL.

* M680X: Refactored cpu_type initialization for better readability.

* M680X: Add two operands for insn having two reg. in mnemonic. e.g. ABX.

* M680X: Remove typo in cstool.c

* M680X: Some format improvements in changed_regs.

* M680X: Remove insn id string list from tests (C/python/java/ocaml).

* M680X: SEXW, set access of reg. D to WRITE.

* M680X: Sort changed_regs in increasing m680x_insn order.

* M680X: Add M68HC11 support + Reduced from two to one INDEXED operand.

* M680X: cstool, also write '(in mnemonic)' for second reg. operand.

* M680X: Add BRN/LBRN to group JUMP and BRAREL.

* M680X: For Bcc/LBcc/BRSET/BRCLR set reg. CC to read access.

* M680X: Correctly print negative immediate values with option CS_OPT_UNSIGNED.

* M680X: Rename some instruction handlers.

* M680X: Add M68HC05 support.

* M680X: Dont print prefix '<' for direct addr. mode.

* M680X: Add M68HC08 support + resorted tables + bug fixes.

* M680X: Add Freescale HCS08 support.

* M680X: Changed group names, avoid spaces.

* M680X: Refactoring, rename addessing mode handlers.

* M680X: indexed addr. mode, changed pre/post inc-/decrement representation.

* M680X: Rename some M6809/HD6309 specific functions.

* M680X: Add CPU12 (68HC12/HCS12) support.

* M680X: Correctly display illegal instruction as FCB .

* M680X: bugfix: BRA/BRN/BSR/LBRA/LBRN/LBSR does not read CC reg.

* M680X: bugfix: Correctly check for sufficient code size for M6809 indexed addressing.

* M680X: Better support for changing insn id within handler for addessing mode.

* M680X: Remove warnings.

* M680X: In set_changed_regs_read_write_counts use own access_mode.

* M680X: Split cpu specific tables into separate *.inc files.

* M680X: Remove warnings.

* M680X: Removed address_mode. Addressing mode is available in operand.type

* M680X: Bugfix: BSET/BCLR/BRSET/BRCLR correct read/modify CC reg.

* M680X: Remove register TMP1. It is first visible in CPU12X.

* M680X: Performance improvement + bug fixes.

* M680X: Performance improvement, make cpu_tables const static.

* M680X: Simplify operand decoding by using two handlers.

* M680X: Replace M680X_OP_INDEX by M680X_OP_CONSTANT + bugfix in java/python/ocaml bindings.

* M680X: Format with astyle.

* M680X: Update documentation.

* M680X: Corrected author for m680x specific files.

* M680X: Make max. number of architectures single source.
2017-10-21 21:44:36 +08:00
Nick Briggs
ce3f0d0935 Rename test.c to test_basic.c with corresponding executable name change. (#923)
* Rename test.c to test_basic.c with corresponding executable name change.

* Fix Makefile, tests/Makefile to comprehend renamed test program. See issue #922

* Fix XCode project to comprehend renamed test program.  See issue #922

* Rename python test.py to test_basic.py to parallel C test name.  See issue #922

* Rename ocaml test.ml to test_basic.ml to parallel C test name.  See issue #922

* Fix MSVC project definitions to comprehend renamed test program.  See issue #922
2017-05-11 22:58:12 +07:00
Fotis Loukos
0850d55211 Added support for the TMS320C64x architecture. 2017-04-14 17:00:40 +03:00
Andrew Dutcher
106d241cba Python setup: Clean up some merge failures, adapt for changes on next branch 2016-10-26 23:15:42 -07:00
Andrew Dutcher
f4aed6025f Python: Make cython work with extreme prejudice 2016-10-25 21:49:58 -07:00
Andrew Dutcher
d8111c1dc9 Python: make setup work as expected 2016-10-25 21:48:18 -07:00
Andrew Dutcher
3a5c10686b Python: Make cython work with extreme prejudice 2016-10-21 03:30:50 -07:00
Andrew Dutcher
7ff79aabc9 Python: make setup work as expected 2016-10-14 05:06:30 -07:00
Pranith Kumar
94f8aef1da Fix error return code 2016-06-29 11:08:13 -04:00
Pranith Kumar
8375270e78 Handle python test failure properly 2016-04-30 13:12:16 -04:00
jmechnich
23f1203616 bugfix: removed leading ./ from OBJDIR to avoid corrupting setup.py install 2016-03-26 10:29:52 +08:00
jmechnich
9119e15f64 bugfix: removed leading ./ from OBJDIR to avoid corrupting setup.py install 2016-03-25 22:31:13 +01:00
Daniel Collin
2ee675c10a This adds M68K support to Capstone 2015-10-02 20:47:00 +02:00
Nguyen Anh Quynh
1319f0c6d7 python: rename test.py to test_basic.py 2015-06-03 22:14:59 +08:00
Hank Leininger
1c0288043c Add DESTDIR support for the python binding.
Without this patch, DESTDIR is ignored, so build systems that use a
staging sandbox prior to installing in real-root, such as Gentoo,
cannot build the python binding.

Caveats:

1) I wrote/tested this against the 3.0.2 release, not current HEAD.

2) It might be preferable to do DESTDIR ?= / at the top of the Makefile,
   so that the if/else/fi can be squashed back out.

3) The install_cython target probably needs a similar change; untested.

4) Other bindings might need something similar.
2015-04-07 13:16:55 +08:00
Hank Leininger
e5da2da2f1
Add DESTDIR support for the python binding.
Without this patch, DESTDIR is ignored, so build systems that use a
staging sandbox prior to installing in real-root, such as Gentoo,
cannot build the python binding.

Caveats:

1) I wrote/tested this against the 3.0.2 release, not current HEAD.

2) It might be preferable to do DESTDIR ?= / at the top of the Makefile,
   so that the if/else/fi can be squashed back out.

3) The install_cython target probably needs a similar change; untested.

4) Other bindings might need something similar.
2015-04-06 16:40:31 -04:00
Nguyen Anh Quynh
4544ba1f02 cython: support cs_regs_access() API 2015-04-02 22:54:52 +08:00
Nguyen Anh Quynh
a87c0b01ad python: rename Windows package from capstone-win to capstone-windows 2015-02-04 10:34:38 +08:00
Nguyen Anh Quynh
59bc84de1d python: distribute msvcr120.dll for Windows installer 2015-02-04 10:33:55 +08:00
Nguyen Anh Quynh
58a8369067 python: clean prebuilt core in install targets of Makefile 2015-02-04 10:33:43 +08:00
Nguyen Anh Quynh
35ceed7b8f python: fix installer 2015-02-04 10:33:29 +08:00
Nguyen Anh Quynh
0498085a1c python: add README.pypi* 2015-02-04 10:31:54 +08:00
Nguyen Anh Quynh
00eb3dea4f python: setup.py only copies source if prebuilt libs are not existent 2015-02-04 10:31:28 +08:00
Nguyen Anh Quynh
4892c45204 python: rename Windows package from capstone-win to capstone-windows 2015-02-03 22:30:10 +08:00
Nguyen Anh Quynh
c6b1be8b0b python: distribute msvcr120.dll for Windows installer 2015-02-03 16:28:27 +08:00
Nguyen Anh Quynh
6685aa5889 python: clean prebuilt core in install targets of Makefile 2015-02-03 12:08:56 +08:00
Nguyen Anh Quynh
a2b60305dc python: fix installer 2015-02-03 11:45:20 +08:00
Nguyen Anh Quynh
064a602b03 python: add README.pypi* 2015-02-03 10:20:30 +08:00
Nguyen Anh Quynh
77bd828465 python: setup.py only copies source if prebuilt libs are not existent 2015-02-03 09:24:14 +08:00
Nguyen Anh Quynh
bf54d4b1a8 python: add targets 'sdist' & 'sdist3' to Makefile 2015-01-30 14:20:09 +08:00
Nguyen Anh Quynh
ca3999f9e6 python: add targets 'sdist' & 'sdist3' to Makefile 2015-01-30 14:20:04 +08:00
Nguyen Anh Quynh
5af0ceda09 python: delete src/ in Makefile 2015-01-30 13:31:21 +08:00
Nguyen Anh Quynh
8113cda2f9 python: delete src/ in Makefile 2015-01-30 13:27:25 +08:00
Nguyen Anh Quynh
ce10b01ad5 python: fix setup.py, so we only copy the core with sdist, thus normal build/compile process does not build the core 2015-01-30 10:49:01 +08:00
Nguyen Tan Cong
1b8cc8d2af reverse -b option in Makefile; parse parameters with parse_known_args to ignore error when passing extra options; fixbug python3: use print statement 2015-01-30 10:48:29 +08:00
Nguyen Tan Cong
b54c60c063 Edit Makefile to appropriate with new setup.py 2015-01-30 10:48:12 +08:00
Nguyen Anh Quynh
6b9b032081 python: fix setup.py, so we only copy the core with sdist, thus normal build/compile process does not build the core 2015-01-30 10:21:09 +08:00
Nguyen Tan Cong
dfe827e86a reverse -b option in Makefile; parse parameters with parse_known_args to ignore error when passing extra options; fixbug python3: use print statement 2015-01-30 00:25:08 +07:00
Nguyen Tan Cong
7c03cd88ed Edit Makefile to appropriate with new setup.py 2015-01-29 23:21:35 +07:00
Nguyen Anh Quynh
984d45068c Makefile: add 'check' target 2014-10-01 16:42:29 +08:00
danghvu
ebeec9d9c2 Cython: update installation and tests to v3 2014-09-29 11:55:01 -05:00
Nguyen Anh Quynh
553bb488d7 python: support XCore 2014-05-26 23:47:45 +08:00
danghvu
0c478ab2f9 Fix Makefile to use && as well in bindings 2014-05-12 14:35:54 -05:00