mirror of
https://github.com/capstone-engine/capstone
synced 2026-08-11 16:26:07 -04:00
* Add ARC files * Added ARC files for successful compilation * Refactor ARC files * Add ARC c/cs tests * Add ARC python test/bindings * Add ARC to CI/CD * Avoid omitting parameter names * Update cs files * Fix ARC bugs * Update ARC python bindings * Refactor and update ARC test files * Add detail flag to arc test * Fix ARC test problems * Fix ARCMapping compile error * Replace __CHAR_BIT__ to CHAR_BIT * Add credits and ARC info * Update ARC to match the latest next * Python formatting * Remove asserts on 'Unknown condition code passed' * Add ARC to some more documentation * Add ARC to Targets constants * Add ARC support to llvm-tblgen * Replace asserts & add Expr handling * Check DecodeGPR32RegisterClass return value * Fix fieldFromInstruction patch * Refactor ARC * Reformat python files * Fix incorrect import * Update inc files and insn names * Update python files * Disable AArch64 Linux wheel build due to https://github.com/capstone-engine/capstone/issues/2615. --------- Co-authored-by: R33v0LT <sibirtsevdl@gmail.com>
74 lines
1.7 KiB
C
74 lines
1.7 KiB
C
#include <stdio.h>
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#include <capstone/capstone.h>
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#include "cstool.h"
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void print_insn_detail_arc(csh handle, cs_insn *ins)
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{
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cs_arc *arc;
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int i;
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cs_regs regs_read, regs_write;
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uint8_t regs_read_count, regs_write_count;
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uint8_t access;
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// detail can be NULL on "data" instruction if SKIPDATA option is turned ON
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if (ins->detail == NULL)
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return;
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arc = &(ins->detail->arc);
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if (arc->op_count)
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printf("\top_count: %u\n", arc->op_count);
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for (i = 0; i < arc->op_count; i++) {
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cs_arc_op *op = &(arc->operands[i]);
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switch ((int)op->type) {
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default:
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break;
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case ARC_OP_REG:
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printf("\t\toperands[%u].type: REG = %s\n", i,
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cs_reg_name(handle, op->reg));
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break;
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case ARC_OP_IMM:
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printf("\t\toperands[%u].type: IMM = 0x%lx\n", i,
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(long)op->imm);
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break;
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}
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access = op->access;
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switch (access) {
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default:
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break;
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case CS_AC_READ:
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printf("\t\toperands[%u].access: READ\n", i);
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break;
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case CS_AC_WRITE:
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printf("\t\toperands[%u].access: WRITE\n", i);
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break;
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case CS_AC_READ | CS_AC_WRITE:
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printf("\t\toperands[%u].access: READ | WRITE\n", i);
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break;
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}
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}
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if (ins->detail->writeback)
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printf("\tWrite-back: True\n");
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/* print all registers that are involved in this instruction */
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if (!cs_regs_access(handle, ins, regs_read, ®s_read_count,
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regs_write, ®s_write_count)) {
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if (regs_read_count) {
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printf("\tRegisters read:");
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for (i = 0; i < regs_read_count; i++)
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printf(" %s",
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cs_reg_name(handle, regs_read[i]));
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printf("\n");
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}
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if (regs_write_count) {
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printf("\tRegisters modified:");
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for (i = 0; i < regs_write_count; i++)
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printf(" %s",
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cs_reg_name(handle, regs_write[i]));
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printf("\n");
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}
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}
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}
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