capstone/cstool/cstool_arc.c
Rot127 d7ef910bc6
Rebased #2570 (#2614)
* Add ARC files

* Added ARC files for successful compilation

* Refactor ARC files

* Add ARC c/cs tests

* Add ARC python test/bindings

* Add ARC to CI/CD

* Avoid omitting parameter names

* Update cs files

* Fix ARC bugs

* Update ARC python bindings

* Refactor and update ARC test files

* Add detail flag to arc test

* Fix ARC test problems

* Fix ARCMapping compile error

* Replace __CHAR_BIT__ to CHAR_BIT

* Add credits and ARC info

* Update ARC to match the latest next

* Python formatting

* Remove asserts on 'Unknown condition code passed'

* Add ARC to some more documentation

* Add ARC to Targets constants

* Add ARC support to llvm-tblgen

* Replace asserts & add Expr handling

* Check DecodeGPR32RegisterClass return value

* Fix fieldFromInstruction patch

* Refactor ARC

* Reformat python files

* Fix incorrect import

* Update inc files and insn names

* Update python files

* Disable AArch64 Linux wheel build due to https://github.com/capstone-engine/capstone/issues/2615.

---------

Co-authored-by: R33v0LT <sibirtsevdl@gmail.com>
2025-01-28 22:34:24 +08:00

74 lines
1.7 KiB
C

#include <stdio.h>
#include <capstone/capstone.h>
#include "cstool.h"
void print_insn_detail_arc(csh handle, cs_insn *ins)
{
cs_arc *arc;
int i;
cs_regs regs_read, regs_write;
uint8_t regs_read_count, regs_write_count;
uint8_t access;
// detail can be NULL on "data" instruction if SKIPDATA option is turned ON
if (ins->detail == NULL)
return;
arc = &(ins->detail->arc);
if (arc->op_count)
printf("\top_count: %u\n", arc->op_count);
for (i = 0; i < arc->op_count; i++) {
cs_arc_op *op = &(arc->operands[i]);
switch ((int)op->type) {
default:
break;
case ARC_OP_REG:
printf("\t\toperands[%u].type: REG = %s\n", i,
cs_reg_name(handle, op->reg));
break;
case ARC_OP_IMM:
printf("\t\toperands[%u].type: IMM = 0x%lx\n", i,
(long)op->imm);
break;
}
access = op->access;
switch (access) {
default:
break;
case CS_AC_READ:
printf("\t\toperands[%u].access: READ\n", i);
break;
case CS_AC_WRITE:
printf("\t\toperands[%u].access: WRITE\n", i);
break;
case CS_AC_READ | CS_AC_WRITE:
printf("\t\toperands[%u].access: READ | WRITE\n", i);
break;
}
}
if (ins->detail->writeback)
printf("\tWrite-back: True\n");
/* print all registers that are involved in this instruction */
if (!cs_regs_access(handle, ins, regs_read, &regs_read_count,
regs_write, &regs_write_count)) {
if (regs_read_count) {
printf("\tRegisters read:");
for (i = 0; i < regs_read_count; i++)
printf(" %s",
cs_reg_name(handle, regs_read[i]));
printf("\n");
}
if (regs_write_count) {
printf("\tRegisters modified:");
for (i = 0; i < regs_write_count; i++)
printf(" %s",
cs_reg_name(handle, regs_write[i]));
printf("\n");
}
}
}