capstone/include
Denys Melnyk 4eb90672f3
Xtensa: gate ESP32-S3 and HIFI3 ops behind CS_MODE_XTENSA_ESP32S3 (#2979)
The Xtensa disassembler enabled the ESP32-S3 SIMD/AI (ee.*) and HiFi3 ops for
every target because the subtarget feature gates were stubbed to return true
(Xtensa_getFeatureBits and hasDensity/hasESP32S3Ops/hasHIFI3). As a result, on a
non-ESP32-S3 Xtensa config any instruction with op0=0xE/0xF was matched as a
4-byte ee.* op, so a base-ISA byte stream desynced.

Make Xtensa_getFeatureBits map the mode to a feature set (mirroring the SystemZ
precedent), thread MI->csh->mode into the three has*Ops gates, and add an opt-in
CS_MODE_XTENSA_ESP32S3. Base/esp32/esp32s2/esp8266 no longer emit ESP32-S3 ops;
CS_MODE_XTENSA_ESP32S3 preserves them. Concrete instance of issue #1992.

The saved auto-sync patch hashes are updated so the fix survives the next LLVM
re-sync. Adds tests/MC/Xtensa/esp32s3.s.yaml.

Co-authored-by: Denys Melnyk <denys@com2cloud.com>
2026-07-22 16:13:28 +00:00
..
capstone Xtensa: gate ESP32-S3 and HIFI3 ops behind CS_MODE_XTENSA_ESP32S3 (#2979) 2026-07-22 16:13:28 +00:00
windowsce Add workflow to check for C code formatting and format all code with clang-format-17 (#2744) 2025-08-27 08:50:50 +00:00
platform.h Add workflow to check for C code formatting and format all code with clang-format-17 (#2744) 2025-08-27 08:50:50 +00:00