MultiByteToWideChar() and its constants are defined in
<stringapiset.h>, which is *not* included in <windows.h>.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Adding the pattern number broke show_iflags(). This only produced
incorrect code comments and so had no actual effect, but it definitely
is not good for debugging!
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
These aren't APX instructions; the vex+ annotation automatically adds
the APX flag when appropriate.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
In os_mangle_filename() with _WIN32, MultiByteToWideChar() was being
called with five arguments instead of six, missing the actual
string to convert(!)
Fixes: 5dfcfc8cab
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
q is passed in by reference and the value of q is never examined, so
there is absolutely no reason to set q = NULL in nasm_free().
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Make saa_wleb128[us]() take uint64_t and int64_t, respectively, rather
than int.
Notably, if saa_wleb128u() were to receive negative int, it would have
looped forever.
Recode these functions in a style more consistent with NASM code in
general, and possibly a bit simpler.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
filename_set_extension() with extension "" would leave the string not
NUL-terminated, because elen == 0.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The "reg_al,imm8" (04+ opcodes) were missing from the $arith macro.
Check via: 04 11 => must be add al, 11
Fixes: f0dc7c220d
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
C2y adds \o for octal byte escapes, and allows \x, \o, or \u escape
sequences to be enclosed in braces to indicate their termination.
Add a \d sequence as a NASM extension to allow decimal bytes to be
specified.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
When using -LX to debug template selection, emit the specific template
number (as per insnsa.c) as well as the xda line number.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Disentangle the list option setting from the list option
checking. This makes the code simpler for the compiler to grok, and
centralizing code is usually a good idea.
The option setting is hardly performance critical anyway.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Adding information about the NASM internal state to the list file can
be useful for debugging purposes. Separate the list of options that
are "user" options and those that are "debugging" options. The latter
are not implied by -L+ and are intended for NASM developer use.
Introduce -LX, which lists which instruction patterns are matched by
each instruction.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
- Document the fix to the JMP/CALL immediate size.
- Keep the convention to use capitals for keywords and instructions.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The "rel" and "iwd" byte codes are supposed to be sensitive to the
operand size of the instruction, but inadvertently were only sensitive
to the CPU mode or an explicit size override for the operand.
"rel" affects direct near jumps, calls, and XBEGIN; "iwd" direct far
jumps and calls. No other instructions use these opcodes.
Fix this, so that e.g. "o32 jmp foo" is treated the same as "jmp dword
foo".
Correct the golden copies of the jmpxx travis tests (which were always
wrong.)
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Add the line number from insns.xda to struct itemplate. NASM itself
doesn't need this information, but it makes debugging matching *much*
easier; it is worth a few more bytes.
In theory it could be conditionalized on --enable-debug, but it is
probably not worth it.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The --bits option makes the BITS hack unnecessary, and it somewhat
conflicts with the directive name itself.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
After macroization PUSH lost the NOLONG flags. That in turn caused
matching the 32-bit template when using the dword size specifier and
when in 64-bit mode. Giving the o32 entry the NOLONG flag seems to force
the o64 template instead which doesn't trigger warnings about 32-bit
sizes not being allowed.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Revert part of macroization that caused incorrect instruction template
matching. The behavior known at 2.16.03 changed due to the rm#,sbyte#
format overtaking other formats. To get back to the previous behavior
the patterns need to intertwine just as is presented here.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Previous disassembler fix caused the FAR enconding not getting properly
applied when using the rm format.
Put the disassembler entries at the back so they are preffered by the
assembler and the FAR versions of memory references are correctly
matched.
Update the far tests.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
POP doesn't have the OSIZE iflag which made it match the 16-bit
instruction variant and the reject valid osize prefixes likes o32 in 32
bit mode.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Update the travis test binaries that the tests are compared against.
Changes were made to some instruction patterns and the binaries need to
be refreshed.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
- Add a test for pushing immediates and popping registers of various
sizes.
- Add a common header file which probably will be useful for many
tests.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
After readding the JMP rm# variant, to fix the disassembler not
recognizing it, some patterns stopped assembling. It happened due to the
program matching an incorrect template and then complaining that it's
illegal.
Adding the NOLONG to word and dword versions (similarly to CALL) fixes
the problem.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
It isn't clear if this is actually mandatory, but it is consistent
with the rest of the directories.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Use cp without -u to generate the documentation as the -u option doesn't
have to be present on other POSIX platforms and breaks builing the
project on MacOS.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
After macroization it seems the 'JMP rm' form was replaced by 'JPM
rm#|near' which caused the dissasembler to not emit anything.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Instructions like IRET, POPF and PUSHF used to not have a operand size
specifier but after applying macros they received the 'osm' one -
meaning must be the same as the BITS mode. Which is not true for these
instructions, using the operand size prefix doesn't change their
encoding and their default 64-bit encoding is the 32-bit version.
Align these with other similar instructions like RET, RETF and use the
'od#' keyword which returns their previous behavior.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Add a script which uses objdump to discover sections and symbols from
a binary, and call ndisasm accordingly, then add symbol references to
the ndisasm output.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
- Add a -z option to set the data size to be read (useful with -e)
- Clean up at least some remaining 32-bit assumptions.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Document the logic behind determining the jump sizes, amounts of bytes
emitted related to size and length keywords. Change is related to
issue #181.
Also fix the JMPABS not being visible due to wrong tag used.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Using LOCK on any CMP configuration of operands will result in #UD.
Remove the possibility of adding the LOCK prefix to the CMP instruction.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
To assemble a JMP in the NEAR form the STRICT keyword is needed. This
change introduced recently reportedly breaks building boot sectors and
is non-intuitive since other JMP versions don't behave this way.
Disable optimizing the JMP size if the NEAR keyword is used.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
In cases such as "mov [es:bx], a_label" the operation defaults to a BYTE
size which copies only part of the label value.
Implement a check that warns the user of this issue when no size
specifier is used.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
The UWRMSR was incorrectly encoded with operands swapped. Correct that
mistake.
Some AVX512 and AVX10.2 instructions had incorrect operands in the
database. Correct the tests after fixing the database entries.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
MOVDDUP tuple type uses a compression shift for the disp8 addressing
scheme. The shift depends on the vector lenght and is defined as 8 for
128 bits, 32 for 256 bits and 64 for 512 bits.
Current implementation doesn't work for the 128 bit vector case since
the expression used evaluates to 16 instead of 8. Fix it with a special
if check before the current expression is returned.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
