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Fix lar and lsl second operand size.

Browse source 
Also support 32-bit second operand for extra compatibility against ISA
documentation, although only the low 16 bits are used.

Fixes #261.
This commit is contained in:
Peter Johnson 2011-05-29 13:14:22 -07:00
parent 49c9e09429
commit 3bf0ed3927
4 changed files with 257 additions and 2 deletions
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20
modules/arch/x86/gen_x86_insn.py
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@ -3081,8 +3081,24 @@ add_insn("nop", "onebyte", modifiers=[0x90])
#
# Protection control
#
add_insn("lar", "bsfr", modifiers=[0x02], cpu=["286", "Prot"])
add_insn("lsl", "bsfr", modifiers=[0x03], cpu=["286", "Prot"])
for sfx, sz, sz2 in zip("wlq", [16, 32, 64], [16, 32, 32]):
add_group("larlsl",
suffix=sfx,
modifiers=["Op1Add"],
opersize=sz,
opcode=[0x0F, 0x00],
operands=[Operand(type="Reg", size=sz, dest="Spare"),
Operand(type="Reg", size=sz2, dest="EA")])
add_group("larlsl",
suffix=sfx,
modifiers=["Op1Add"],
opersize=sz,
opcode=[0x0F, 0x00],
operands=[Operand(type="Reg", size=sz, dest="Spare"),
Operand(type="RM", size=16, relaxed=True, dest="EA")])
add_insn("lar", "larlsl", modifiers=[0x02], cpu=["286", "Prot"])
add_insn("lsl", "larlsl", modifiers=[0x03], cpu=["286", "Prot"])
add_group("arpl",
suffix="w",

2
modules/arch/x86/tests/Makefile.inc
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@ -95,6 +95,8 @@ EXTRA_DIST += modules/arch/x86/tests/jmp64-6.asm
EXTRA_DIST += modules/arch/x86/tests/jmp64-6.hex
EXTRA_DIST += modules/arch/x86/tests/jmpfar.asm
EXTRA_DIST += modules/arch/x86/tests/jmpfar.hex
EXTRA_DIST += modules/arch/x86/tests/larlsl.asm
EXTRA_DIST += modules/arch/x86/tests/larlsl.hex
EXTRA_DIST += modules/arch/x86/tests/lds.asm
EXTRA_DIST += modules/arch/x86/tests/lds.hex
EXTRA_DIST += modules/arch/x86/tests/loopadsz.asm

59
modules/arch/x86/tests/larlsl.asm Normal file
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@ -0,0 +1,59 @@
[bits 16]
lar ax, bx
lar ax, [bx]
lar ax, word [bx]
lar eax, bx
lar eax, ebx
lar eax, [bx]
lar eax, word [bx]
lsl ax, bx
lsl ax, [bx]
lsl ax, word [bx]
lsl eax, bx
lsl eax, ebx
lsl eax, [bx]
lsl eax, word [bx]
[bits 32]
lar ax, bx
lar ax, [ebx]
lar ax, word [ebx]
lar eax, bx
lar eax, ebx
lar eax, [ebx]
lar eax, word [ebx]
lsl ax, bx
lsl ax, [ebx]
lsl ax, word [ebx]
lsl eax, bx
lsl eax, ebx
lsl eax, [ebx]
lsl eax, word [ebx]
[bits 64]
lar ax, bx
lar ax, [rbx]
lar ax, word [rbx]
lar eax, bx
lar eax, ebx
lar eax, [rbx]
lar eax, word [rbx]
lar rax, bx
lar rax, ebx
lar rax, [rbx]
lar rax, word [rbx]
lsl ax, bx
lsl ax, [rbx]
lsl ax, word [rbx]
lsl eax, bx
lsl eax, ebx
lsl eax, [rbx]
lsl eax, word [rbx]
lsl rax, bx
lsl rax, ebx
lsl rax, [rbx]
lsl rax, word [rbx]

178
modules/arch/x86/tests/larlsl.hex Normal file
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@ -0,0 +1,178 @@
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