capstone/tests/MC
Denys Melnyk 4eb90672f3
Xtensa: gate ESP32-S3 and HIFI3 ops behind CS_MODE_XTENSA_ESP32S3 (#2979)
The Xtensa disassembler enabled the ESP32-S3 SIMD/AI (ee.*) and HiFi3 ops for
every target because the subtarget feature gates were stubbed to return true
(Xtensa_getFeatureBits and hasDensity/hasESP32S3Ops/hasHIFI3). As a result, on a
non-ESP32-S3 Xtensa config any instruction with op0=0xE/0xF was matched as a
4-byte ee.* op, so a base-ISA byte stream desynced.

Make Xtensa_getFeatureBits map the mode to a feature set (mirroring the SystemZ
precedent), thread MI->csh->mode into the three has*Ops gates, and add an opt-in
CS_MODE_XTENSA_ESP32S3. Base/esp32/esp32s2/esp8266 no longer emit ESP32-S3 ops;
CS_MODE_XTENSA_ESP32S3 preserves them. Concrete instance of issue #1992.

The saved auto-sync patch hashes are updated so the fix survives the next LLVM
re-sync. Adds tests/MC/Xtensa/esp32s3.s.yaml.

Co-authored-by: Denys Melnyk <denys@com2cloud.com>
2026-07-22 16:13:28 +00:00
..
AArch64 Fix 32bit build (#2796) 2026-02-15 16:14:39 +00:00
Alpha Alpha: fix decoder bugs and add test coverage (#2967) 2026-06-20 13:28:47 +00:00
ARC Rebased #2570 (#2614) 2025-01-28 22:34:24 +08:00
ARM Rename CS_OPT_NO_BRANCH_OFFSET and corresponding flag to better name. (#2482) 2024-09-25 15:33:45 +08:00
BPF Update BPF arch (#2568) 2024-12-15 20:46:45 +08:00
HPPA HPPA fix mem operands access and instruction printing (#2746) 2025-07-06 11:21:22 +00:00
LoongArch Modern Testing (#2456) 2024-08-31 21:33:38 +08:00
Mips Mips32r6_64r632 is for both mips32r6 and mips64r6 (#2673) 2025-04-06 22:17:11 +08:00
PowerPC PPC LLVM 18 (#2540) 2024-12-05 19:26:33 +08:00
RISCV RISCV: the Ventana vendor is missing in the API (#2917) 2026-05-13 16:33:27 +00:00
Sparc Auto-Sync update Sparc LLVM-18 (#2704) 2025-06-24 12:45:34 +00:00
SystemZ SystemZ Auto-Sync refactor (#2462) 2024-09-14 16:57:54 +08:00
TriCore Fix wrong version requirement of tricore instructions: (#2620) 2025-02-19 11:52:22 +08:00
X86 Modern Testing (#2456) 2024-08-31 21:33:38 +08:00
Xtensa Xtensa: gate ESP32-S3 and HIFI3 ops behind CS_MODE_XTENSA_ESP32S3 (#2979) 2026-07-22 16:13:28 +00:00